Commit dd0174b3 authored by tebina nasreddine's avatar tebina nasreddine
Browse files

?

parent 601bdf48
......@@ -258,15 +258,16 @@ begin
wait until S_AXI_BVALID = '0'; --AXI Write finished
S_AXI_WSTRB <= b"0000";
S_AXI_ARADDR <= "00000000";
readIt <= '1'; --Start AXI Read from Slave
wait for 1 ns;
wait for 5 ns;
readIt <= '0'; --Clear "Start Read" Flag
wait until S_AXI_RVALID = '1';
wait until S_AXI_RVALID = '0';
S_AXI_ARADDR <= "00000010";
readIt <= '1'; --Start AXI Read from Slave
wait for 1 ns;
wait for 5 ns;
readIt <= '0'; --Clear "Start Read" Flag
wait until S_AXI_RVALID = '1';
wait until S_AXI_RVALID = '0';
......
......@@ -114,6 +114,7 @@ begin
when read_plaintext =>
if S_AXI_AWVALID = '1' and S_AXI_WVALID = '1' then
plaintext_buf(counter) <= S_AXI_WDATA;
if counter = plaintext_reads - 1 then
state <= read_key;
counter <= 0;
......@@ -189,10 +190,11 @@ begin
begin
if S_AXI_ARESETN = '0' then
S_AXI_BVALID <= '0';
else
else if (S_AXI_WVALID ='1') then
S_AXI_BVALID <= '1';
S_AXI_BRESP <= "00";
S_AXI_RRESP <= "00";
end if;
end if;
end process;
......
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